Automotive EMI Demystified: Part 2 – Pursuing an Ideal Power Supply Layout

Good morning, everyone, and
welcome to our automotive EMI webinar. We’re going to start
in just a few minutes. I see that there are
still folks joining us. Now today is our third
automotive focused webinar in our ongoing series that
we launched this year. For those who were
here in the summer, we inaugurated this series
with our fundamentals of EMI, and this was really for
providing some foundation on the hot topic of EMI. We talked about what exactly
is EMI, its sources and power supply design, and how
to generally reduce it. Our second webinar,
which was last month, this covered the topic of
AEC-Q100 qualification. We found through
many discussions a lot of our customers
who were working on automotive systems of
course require AEC-Q100 grade products, but they might not
know exactly what this entails. So our second webinar provided
a really great background on automotive qualification,
explaining the different types of reliability testing
that goes into certifying an automotive product,
and also discussed how the different grades of
solutions that MPS offers– automotive, industrial,
and consumer– are produced and tested
in different ways. So folks, stay tuned
as next year we’re going to have even more episodes
of the automotive webinar series. We’re for sure going to continue
exploring the hot topic of EMI. We’ll have focused sessions
covering specific topics, like spread spectrum. And we’ll dive into other
more general automotive power management topics. Now just a few quick
announcements before we begin. Inside of your Zoom app you
should see a menu option for Q&A. So throughout today’s
webinar if you have questions, please go ahead and submit
those through the Q&A app. At the very end of
our webinar, Jens will go ahead and
address these one by one. If you have any other
questions that come up perhaps after this, you’re always
welcome to email us at
[email protected] And we will make this webinar
available for streaming after today’s session as well
as provide the presentation material in a PDF format. And so now without
further ado, I’m going to turn it over
to Jens Hedrich, who’s going to talk today about
pursuing an ideal power supply layout in the context of EMI. OK. Hello, everybody. I hope you can hear me. I’m Jens Hedrich. I’m FAE at Monolithic
Power Systems since 2010. I am mainly supporting
automotive and industrial customers in Germany and Europe. During the last years,
I had a special focus on improving the EMC performance
of our automotive evaluation boards, and also I spend a lot
of time in EMC labs to do this and in addition helping our
customers troubleshooting my issues Before working at MPS, I
was FAE at Linear Technology for almost 12 years. There, I supported on
EMC clean evaluation board, so-called DC1212. Before I became FAE, I was four
years hardware design engineer at Nokia mobile phones. I worked on an early
automotive telematic solution with e-call and
emergency battery. Agenda for today, some
quick modification slides. We will study initial
PCB real estate planning. We will see how to best
utilize the multilayer board to our advantage. We will discuss and debate
inductor and copper under it. We have some example
schematic and layout of an EMI-optimized
evaluation board. We have a list of frequently
asked questions that I answer, and at the end of the session,
as Aaron told you already, I try to answer the questions
coming in during the session. Here’s an example board that
is thermally optimized, but not optimized for EMI. It does not have
any input filters, it does not have a ground plane. It’s a two-layer board only. It has a huge switch node
area on top and bottom, which will act as a patch antenna,
and the result of this board, according to a CISPR 25
conducted emission test, is a disaster. Here’s a much better board. It has an input filter placed
on the bottom side of the PCB. It’s a four-layer board, and
it has a really good layout already. You can see it can pass the
conducted emission test, according CISPR 25, level five. But it might be a little bit
tight on the more stringent OEM limits. Here’s a much,
much better board. It has significant margin
to the tough OEM limits, like here, 12 dB
microvolt average, and the FM band conducted
emission test 12 dB microvolt is equal to four
microvolt, which is nothing more than 80 nanoamps
flowing in the 50 ohm input impedance of our EMC receiver. Almost nothing. Let’s see how to
get to this level. A quick reminder from last
webinar, from Christian, is if we have a hot
loop, so the input stage of a DC/DC back-converter
is a two power MOSFET in the input
capacitor placed on top of a ground plane. So here this is a ground
plane, and here we have the conductors
of the hot loop. You see the highest
current density concentrating in the center
of this conductor, due to skin effect and proximity effect. But still on the
outer edges, you have a certain current density. This hot loop has, of
course, an AC magnetic field, that it uses eddy
currents and our copper. The eddy currents have
the opposite direction to the conductor on top of them. In the center, in
the very center, we would have
current density zero. At the edge of this
conductor block, we still have certain current
density greater than zero. And actually it goes up a
little bit at the edges, similar to shown here. The distance of this loop
above this ground plane is very important. It should be as
small as possible. The higher it is,
the wider the current will spread out in the copper. Let’s look on a board. If you want to have really
good EMC performance, you have to consider certain
topics right from the beginning of the project. For example, if
the DC/DC converter is placed too close to
the connector and cables, the magnetic and electric
field of the converter will couple into the
connector and cable. And the cable will act as
an antenna and radiate. Also if you place EMC
filter components too close to the DC/DC circuit,
they would pick up noise and we will not get the needed
attenuation of the filter to pass EMI limits. So we have EMI problem. We have to place
a DC/DC converter. If we recall, in
close field condition, the field strength is reduced
with one over distance squared. So what we can do is move
the DC/DC as far away from the connector
and cable as possible. At least three to
five centimeters are needed to bring
the field strength at this connector and
cable area to a level that you can pass EMI. A better solution is to place
the DC/DC converter block on the bottom side of the PCB,
opposite to the connector, under a solid copper area. EMC filter components should be
placed close to the connector. Here’s a side view of a
single-side assembled PCB. We have the hot loop here. There’s a DC/DC back-converter
with the input capacitor. We have the hot
loop, and we have the magnetic field sketched. And we see below this inner
layer one solid copper, ground ideally. We don’t have AC
magnetic field any more. In this picture we also
see that on this board there is no quiet place to
place EMC filter components or connector to the cable. We’ll have noise everywhere. We can do is place a shield
on top of the DC/DC and input capacitor and coil. And if you place a shield, you
get a picture similar to this. A heat-sink, for example,
can also act as a shield. Or the heat-sink for LEDs
power LEDs on LED driver board. So how to use the multilayer
PCB to our advantage. Here’s a topside routing
V-in copper, the power ground copper, the switch node copper. The switch node should
be as small as possible. We have the inductor from switch
to output area located here. And this is a hot loop. Of course this is simplified. Actually the current would
run on the edges of the copper areas. And when we look at this board,
we connect these noisy areas only through vias
to the inner layers, so there is no direct connection
from this power ground copper to the input
ground copper area. So we use the vias. Every via that goes through
this four-layer board has around one nano
[INAUDIBLE] of inductance will act as a filter. So we use it to our advantage. We separate the grounds. Also the power ground, the input
noisy power ground of the power stage, from the
output ground and also from the surrounding grounds. The area under this DC/DC block,
the DC/DC ground reference is noisy because from the high
DIDT loops on the top side we will have eddy
currents flowing in this. So this is not a clean area
to connect to the connector. Layer three is our first
solid ground reference. We also use it
for some routings, and bottom side
of the PCB is also used for some routings
and ground reference. Let’s have a more
three-dimensional look on the same thing. We have the high DIDT
current loop again. We have the splits
and the grounds. And then we have a sketch
of the eddy currents that are flowing in this
blue inner layer ground one. These eddy currents have
highest density under the loop but also at the
edges, as you recall. So also these eddy currents
have magnetic field, and this magnetic
field can couple into other traces and areas
and connectors and cables. Layer three and four
are quiet grounds and used as a system reference. And if you look at
this noisy area, how it is connected to the
critical connection area, we see that we
have several vias, several inductors in series
already that block noise. So this way we manage to
establish very clean ground reference for our
filters and connector. One question that’s
often discussed is, copper under the inductor? Many people say, no, under,
directly under the inductor core we have very strong
AC magnetic fields that will induce eddy
currents in the copper, create losses, and also will
reduce effective inductance. The other opinion is,
yes, copper directly on the top layer to block any
AC magnetic fields disturbing the inner layers of the PCB. So which opinion is right? Let’s have a look. Here’s an SMD bobbin type
semi-shielded inductor placed on a four-layer PCB. You see that under
the core there’s no copper placed
in all four layers. You also see at the
start of winding of this inductor is
connected to the switch node. This is usually helping to
shield e-field radiation from the inductor. This is a sketch of the
magnetic field lines. And you can see that
the very strong field lines in the center of the
coil will close around the PCB. And this way we
couple, or they couple into the cable, the connector,
and any component EMC filter. In the cut out
area of each layer, we have very strong,
very high current density from the eddy currents. On the top side copper, if
there is a solid copper area, we will also see eddy
currents forming, and the eddy currents of course
have an opposite magnetic field to the original magnetic field. This board has no quiet place
to place EMC filters and a cable reference, and it will
be very bad for EMC. Let’s have a more
detailed look on a PCB with a hole in
the center exposed to an AC magnetic field. The AC magnetic field
can be from the hot loop or from the coil. In the center where
we have the hole, the magnetic field
goes straight through. In the surrounding copper,
the AC magnetic field will induce eddy currents. The current density right at the
cut out edge will be very high. At the corner of
this copper area we will again see an
increased current density, and these currents,
the eddy currents, have also a magnetic field. Especially at the
cut out at the edges, these fields are
troublemakers because they can couple into other layers
and cables and connectors. Also if you have
this arrangement, the magnetic field could
couple into adjacent PCBs. Another example is placing
copper in layer four, under the coil. So not directly under the
inductor in layer four. The AC magnetic field
will induce eddy currents in layer four. Also we will see eddy
currents at the edges of the other layers. But the benefit is now, we
don’t have AC magnetic field under the PCB anymore. We don’t have very strong field
lines going around the PCB, only weak ones, and we have
less crosstalk to adjacent PCBs if there are some placed. Problem is with
this arrangement, that the copper layers have
impedance greater than zero. So if we have high
DIDT current flowing, these will create noise. So we have a noisy reference for
our filter components and cable connection. It’s bad for really
good EMC performance. Another example
is placing copper another inductor in all layers. This way the eddy currents
will form in top layer. They will reduce the effective
conductance value maybe by 1%. They will also
create some losses, but the benefit is that we block
the AC magnetic field right here. So from the high magnetic
field of the coil we don’t see field in
layer two, three, and four. This board has a
very clean layer four as a system reference, filter
reference, and cable connection terminal. With this board we can– with this set up, we can get
a very good EMC performance. And of course everywhere
where we have solid copper, the AC magnetic fields
will induce eddy currents, the eddy currents have
a magnetic field that is opposite to the original
field, and on top of the copper it will tend to cancel
the magnetic field. This is very important. Another problem that pops up
if we place under the DC/DC circuit a solid copper area
directly in the inner layer one, is that we build
a parasitic capacitance from the switch node to ground. So at the switch transition,
we will have an AC current flowing across this capacitor. If you look at this 4430 3 and
1/2 amp buck converter layout, you see that the switch
node is roughly 30 square millimeter large. And there’s 100
micrometer distance. We get around 100 picofarads
of parasitic capacitance. This parasitic
capacitance is in parallel to the lower MOSFET
output capacitance, which is in the range
from 3 nano to 7 nano. So this is 30 times higher. The benefit of having a
solid copper area under this is that we can get
80 counts mirror imaging, the high DIDT currents
from the top side of the PCB. And this way, they can cancel
the magnetic field radiation on the topside of the board. And this is more important than
the additional 100 picofarad parasitic capacitance. Let’s have a look
on our schematic for the EMC optimized board. We use a two stage input filter
consisting of a small or eight or five size 1
microhenry inductor that is able to handle more
than three M’s, and two one microfarad eight or
five capacitors placed here. This stage has 19 dB
attenuation at 150 kilohertz. The second stage is
formed with a [INAUDIBLE] at 7 microhenry inductor,
And 24.7 microfarad 12, 10 sized capacitors. This stage adds another 45 dB. So in total, we’re around 64 dB. We get 64 dB intonation. This is a little bit
more than we need. And today, we use
more like 2 microhenry for L2 and a small size, and
still get 57 dB intonation. In this calculation,
we assume that multi-layer ceramic
capacitors have around 50% of the nominal
capacitance at the DC bias or certain volts
from the car battery. It’s a schematic
of our 4430 family that we have pin to pin parts
from 1 amp to 3 and 1/2 amp. You also notice that there
is a 20 ohm resistance just for some bootstrap capacitor. This resistor has the
effect to slow down the rising edge of the switch
node, reducing ringing. But also, it would use as a
high frequency energy that is placed on the inductor, so
we have less E field radiation at high frequency when
this resistor is used. In addition, you see that
we split the frequency determining resistor in two. This is an option for
spread spectrum modulation. Here’s a picture of the
actual components used. So these are the two stage
filter components, very tiny. And these are classical
single stage 10 microhenry, 10 microfarad for its
10 size capacitors. Both stages have
the same intonation at fundamental frequency
of 150 kilohertz, but this filter arrangement
is much more wideband. Upside of the PCB, you
notice in the center, we have V in incoming up,
routed to the V-in pin of the chip in the center. You see the power
ground area, which has a U shape with
two sets of capacitor with opposite orientation. So we will have two count loops
with opposite orientation. You see as a damping
aluminum capacitor. You also notice that we have
two output capacitors placed on each side of
this tiny inductor. So this tiny inductor is used
because this is a 1 amp family member and you can use a
very, very small inductor. And these capacitors actually
shield part of the E field radiation from the inductor. You also see that we have a
cut around the power ground directly on top layer. And the only connection
to the rest of the grounds is through these vias. This way, we effectively
block high frequency content from the hot loop, disturbing
the rest of the PCB. The surrounding DC
DC ground reference– this is also the output
capacitor reference– is also separated from the
very quiet system ground to the cables at the
input and output, only through vias, and then
through the layer underneath. The picture of the
bottom side of support, you immediately see the two
stage filter arrangement. This is symmetric placement
of the filter capacitors. This way, we have the currents
in opposite direction, and we have less crosstalk into
the cable and the other filter stage. This is the option
of 555 circuit that we can use to test
that spectrum modulation. You also see a tiny
6 or 3 capacitor 10 nano placed directly
at the point where my nice load
resistor is connected. If you have a very large
remote load via a cable, you have to add an LC low pass
filter with around 100 to 200 nanohenry, and two of
these small capacitors to filter as a high
frequency noise. It is still getting
through the main inductor. Here’s a detailed
look on the top side. Again, you see the V in area,
the routing to V-in pin. You see the U shape
power ground area on the top side, the two
loops for the input counts, this opposite direction. You see the symmetric placement. You also see here the
analog ground connection to the output ground
to the DC to DC converter ground reference, This is the inner layer one. Here, it is very important
that in the area directly under the IC, it
is to power must fit in the input capacitors. We have no routings, no cuts. Actually, this via for
V-in should move over here to get an even
better performance. This area is needed to
mirror image, to high DIDT currents from the top side. You also noticed that
we have a cut in a layer one around this block. This cut and area is
actually a little bit larger than the top side cut, so
these cuts are not aligned. This is wider. And we have one
ground connection. Where we route the the in
trays, and the layer underneath. Same at the output, you
have one ground connection connecting this block
in the inner layer one to the rest of the board
where we have to output signal to the load. This is inner layer two,
layer three in total. You see the V-in routing
into the DC DC block, and the V-out routing. This is directly under the
ground connection and the layer above. You also see that
we have ground. There’s lots of VR everywhere. And the routings are
covered in ground. So we don’t have crosstalk
between the signals. We treat as DC DC
block like a four port. You have a signal,
or the load current from the source into our
block, and at the same position and the adjacent
layer, the return. Same at the output, we
have the trace to the load, and in the adjacent
layer, directly at the same position,
the return pass. The bottom side,
you see solid ground in the center of the PCB. You can see the EMC filter
components, the 555 block, and the small cap. If you check this area,
there’s a magnetic field probe. You should not see
many magnetic fields. If you see strong
magnetic fields, you have a problem
in the routing. You will have problems
to passing my tests. This is a result
of all our efforts. This is a radiated
monopole test, the low frequency radiated test. When you switch
at 470 kilohertz, usually you have a hard
time to pass the limits at the first harmonic. In this case, we have 5 dB
below the 6.25 level five limit. And this is due to the fact that
we use a very small inductor that does not stand off
much from the PCB, a very small switch area, and
that these capacitors are placed in a way that
they take some of the E field radiation. If you change the
inductor, for example, to a 4 and 1/2
millimeter height type that has these clips at the
side connected to winding, and if this 4 and 1/2 millimeter
high antenna is sitting at the switch node, you will see
that this first peak will go up by around 6 to 7 dB. Another approach is to use coils
which are issued on top of it. These are the ICHLE [INAUDIBLE]. They also help on this. After the emission test
results of this spot, here’s a low frequency using
results spread spectrum. You would see one
single needle that is around tend to be higher. Same here and here. And in the high frequency
conducted emission average, you see a very clean
result, this large margin to the tough OEM limit. Here’s a different
picture of the 4430s, the 3M variant of this family. There’s a bigger 6 by
6 millimeter coil– actually two coils compound– in green. We have a coil that
is 6 millimeter high and has an undefined
start of binding. So we don’t know
how it was binded. In pink, you see the 3
millimeter high part. And this is easily 6 dB
better on both bands. This is the easiest way to
get a better performance. Last slide is showing
the radiated emission by conical antenna
from 30 megahertz to 2 and 1/2 megahertz. Average result
horizontal, polarization that was [INAUDIBLE]
at the vertical. But it’s around noise level. It’s very, very clean. It’s come to the
frequently asked questions about layout for EMC. Why is it aluminum
Elco at the VM? It’s for damping. The high Q tech circuit formed
by the cable and the ceramic in capacitors. It also stands also PCB
by several millimeters and helps to collect some
of the E field radiation from the inductor. Is there any
difference in output filtering for buck
and a boost topology? We discussed the converter
layout and filtering, and the buck converter
has a fully switched input count, which is very noisy. So you need all this
filtering that we discussed. The boost converter is
a mirror image of buck, so the output side
is fully switched, and we need all this
filtering effort we discussed on the output
of a boost component. How about a 4 switch
buck boost converter? Depending on the duty cycle,
or the V in to V out ratio, both input and output
can be switched. So we need filtering
on both sides. [INAUDIBLE] connect
analog and power ground at the power I see. I covered this so a power
ground is very noisy. It’s only connected
through vias. And the analog
ground is referred to the output ground of the
output capacitor, which is a quiet ground of the socket. Whenever you can, you should
go for more than four layers if commercially available. As you can see in
our layout already, we do some compromises. And with six layers,
for example, you can use a full layer, 2
and 5 as ground planes, and you will get a even
better EMC performance. But you keep any
errors free of copper. Everything that is
not used for routing should be used,
this ground copper. But in each corner
of these areas, you need to have vias
to ground to make sure these structures
don’t act as antennas. If you cannot connect
these areas with vias, you better take them out. Otherwise, they will
act as patch antennas so these so-called
finger structures that have a long edge. Without a via, you
should remove them. The input connect the shape. Elevation above the board
has an influence on EMI. Everything that
stands off the PCB can act as an antenna
for radiation, but also for receiving. So a connector that is very
high elevated above the PCB is collecting more
noise than a flat one. The NC pins and the
thermal pad of the IC should be connected to ground. Ground is always the most
steady potential in the board. What is the optimum
number and spacing of via holes to
connect the top layer ground to the internal ground? This depends. If you have a
noisy area, we only use as many vias as absolutely
needed to carry the account. If we have a quiet area and
we need to transfer heat, we use more vias. So this is the end of
the general session. I will now look
into the questions and try to answer them. As Aaron mentioned,
there’s one question, I’ll be able to
download the slides? Yes, we will provide a PDF
of the webinar later on. There’s another question. If you use a common mode
choke, do you put ground under this device as well? A common mode choke on input of
an outmoded system is usually not such [INAUDIBLE]
because this way, you increase the
ground impedance, you block common mode noise– this is typically e-field
radiations from the inductor– and you have usually
other connections to ground of your ports. The chassis of
the car is ground. So you have a canvas or
whatever, other signals, and then you get another ground
reference or ground connections at the bypass, but
can potentially bypass your common mode choke. Under the common mode choke,
you probably don’t do copper. Usually, we try to avoid common
mode chokes whenever possible. If you test the EVQ, test bought
is half of the vias shown. And you saw a significant
difference in my performance. No, we did not test
these less vias, but we did one to one tests,
and with all these cuts in top and inner
layer, and we have seen a significant difference. Another question is what if
you can only use ceramic caps? As alternatives, the ceramic
cap is, in principle, very good for the
EMC performance because it’s very low
inductions, very low ESR. The only thing is the damping
of the high IQ input circuit. You can use ceramic caps in
serious with a small resistor like one ohm, but
damping capacitance should be at least two times
better, three times larger than the undimmed capacitance Another question is what
if cost prohibit for layer? Two layer is very difficult.
I can show an example and discuss it with
you, but it’s tough. The last question I
see here, are there further considerations
for immunity performance? So in principle, the EMC filters
are working bi-directional. So if you really have low
radiation of the board, you’re also immune
to external noise sources at these frequencies. In the backup slide, I
have the two layer example. And actually, the problems
started on the two layer board. Your potential ground area is
more than a millimeter away. Compared to the 100 micrometer
distance between the hot loop and the inner layer ground
that we really recommend, you have already a 15
to 20 dB disadvantage in the magnet field cancellation
of the hot loop now. So the Eddy currents
are far away, and you don’t get the
good cancellation. The other thing is you have to
somehow route all the signals. So you will not have
this idea ground plan that I sketched here. So you will have routings. And these rulings will
increase the impedance of the ground plane. And also, you can couple
directly from your circuit into the ground. So this is much more difficult
to establish on a two layer board. So one thing is clear. If you have to do
two layer, you have to make sure that
under this block, you have a solid ground area. No routings there. You really have to find ways
to spread the signals in a way that you don’t cut the ground
under the hot loop area. This is very important. You have you have a hard time
to separate the noisy ground, but you have the Eddy currents
from your connector ground. This out increasing
the general ground impedance because the ground
is your system reference. If you have any
transients here, you don’t want to have a huge
impedance from here to there. Otherwise, you get
potential differences. OK, I hope this helps. There’s a last
question coming in, how to optimize internal noise
frequency of DC DC converter, for example tune hertz,
megahertz, which shows issue in to make a meter bend. So in general, if you compare
a 500 kilohertz switching frequency to 2 megahertz,
you will get around 30 dB higher noise in fixed
frequency in the FM band. Here, have a spread spectrum
example, which is 60 D higher. So this is always
a disadvantage. And if you have
very tough limits, these 2 megahertz on car battery
input, you have a hard time. What we have learned is that
this noise here, there’s a really good layout dominated
by the E field radiation from the inductor. So you should definitely
not use something like this. You should use an inductor
that has a very flat and a defined start of winding,
and nothing sticking up that is carrying switch node. Any more questions? Jens, just one last one that
came in through the chat app. The question is the heat
sink is aluminum normally. How can it act as a shield for
magnetic fields in the buck converter example? Yeah, this is a
very good question. The heat signal is
actually used to block E field radiation from the
inductor and the switch node. And for shielding
magnetic field, you need high
conductivity copper. This is giving a
much better result. So this is a good catch. OK, folks. Thank you so much
for joining us today for our second automotive
EMI focus webinar. Like we mentioned at the
start of today’s sessions, we will be continuing
this series in 2019, diving deeper into
EMI, and also focusing on some other automotive
power management topics. Today’s webinar will be
available for streaming later, as well as you’ll be able
to download the presentation in a PDF format. We’ll make this available and
you’ll get the notification through email. Now, if you’d like to also
take a look at our previous webinars, everything’s
available at Again, that’s And of course,
we’ll include a link to this in the
email that will be sent to all participants
later today or tomorrow. So folks, thanks again for
joining us, and a special thank you to Jens
Hedrich, our EMC expert, for hosting this really
informative session. And we’ll see you next time.